Abstract
Nanoelectronic devices embedded in the two-dimensional electron system (2DES) of a GaAs/(Al, Ga) As heterostructure enable a large variety of applications ranging from fundamental research to high-speed transistors. Electrical circuits are thereby commonly defined by creating barriers for carriers by the selective depletion of a preexisting 2DES. We explore an alternative approach: we deplete the 2DES globally by applying a negative voltage to a global top gate and screen the electric field of the top gate only locally using nanoscale gates placed on the wafer surface between the plane of the 2DES and the top gate. Free carriers are located beneath the screen gates, and their properties can be controlled by means of geometry and applied voltages. This method promises considerable advantages for the definition of complex circuits by the electric-field effect, as it allows us to reduce the number of gates and simplify gate geometries. Examples are carrier systems with ring topology or large arrays of quantum dots. We present a first exploration of this method pursuing field effect, Hall effect, and Aharonov-Bohm measurements to study electrostatic, dynamic, and coherent properties.
| Item Type: | Journal article |
|---|---|
| Faculties: | Physics |
| Research Centers: | Center for NanoScience (CENS) |
| Subjects: | 500 Science > 530 Physics 500 Science > 500 Science |
| ISSN: | 2331-7019 |
| Language: | English |
| Item ID: | 53523 |
| Date Deposited: | 14. Jun 2018 09:53 |
| Last Modified: | 04. Nov 2020 13:32 |
