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Kowalewski, Roger; Fuchs, Tobias; Fürlinger, Karl and Guggemos, Tobias (2018): Utilizing Heterogeneous Memory Hierarchies in the PGAS Model. In: 2018 26Th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (Pdp 2018): pp. 353-357

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Emerging technologies such as non-volatile or 3D-stacked memory significantly impact the design of future high performance computing systems. To keep up with the increasing core count, relying only on DRAM is inefficient due to its static power consumption. Modern HPC architectures feature a heterogeneous memory hierarchy with different capacities and capabilities. This paper addresses two challenges. First, we need programming models to abstract the complexity of the underlying heterogeneous memory hierarchy, while still giving explicit control to domain experts. We propose the concept of memory spaces to model a heterogeneous memory hierarchy and integrate it into a PGAS-like programming model. Second, we need to understand the impact of different memory capabilities on the performance of scientific applications. An experimental evaluation with a series of benchmarks, conducted on a Intel KNL platform, reveals that proper data placement on specific types of memory achieves significant speedup.

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